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  cystech electronics corp. spec. no. : c657t3 issued date : 2011.02.23 revised date :2012.06.14 page no. : 1/5 BTA1640T3 cystek product specification pnp epitaxial planar power transistor bv ceo -30v i c -7a r cesat 70m (typ.) BTA1640T3 features ? low collector-emitter saturation voltage, v ce(sat) = -0.4v(max) @ i c = -3a, i b =-0.1a. ? excellent current gain linearity. ? rohs compliant package. symbol outline absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage v cbo -30 v collector-emitter voltage v ceo -30 v emitter-base voltage v ebo -18 v collector current (dc) i c -7 collector current (pulse) i cp -10 (note 1) a power dissipation @ t a =25 p d 1 power dissipation @ t c =25 p d 20 w thermal resistance, junction to ambient r ja 125 c/w thermal resistance, junction to case r jc 6.25 c/w junction temperature tj 150 c storage temperature tstg -55~+150 c note : 1. single pulse , pw Q 380 s, duty Q 2%. BTA1640T3 to-126 e c b b base c collector e emitter
cystech electronics corp. spec. no. : c657t3 issued date : 2011.02.23 revised date :2012.06.14 page no. : 2/5 BTA1640T3 cystek product specification characteristics (ta=25 c) symbol min. typ. max. unit test conditions *bv ceo -30 - - v i c =-10ma, i b =0 bv cbo -30 - - v i c =-1ma, i e =0 bv ebo -18 - - v i e =-1ma, i c =0 i ceo - - -10 a v ce =-30v, i b =0 i cbo - - -100 na v cb =-30v, i b =0 i ebo - - -100 na v eb =-15v, i c =0 *v ce(sat) - -0.2 -0.4 v i c =-3a, i b =-100ma *v ce(sat) - -0.42 -0.7 v i c =-5a, i b =-100ma *v be(sat) - - -1.2 v i c =-3a, i b =-100ma *h fe 1 150 - 400 - v ce =-2v, i c =-500ma *h fe 2 60 - - - v ce =-2v, i c =-4a *pulse test : pulse width 380 s, duty cycle 2% classification of h fe 1 rank a b range 150~300 200~400 ordering information device package shipping marking to-126 BTA1640T3 200 pcs / bag, 10 bags/box, 10 boxes/carton a1640 (rohs compliant) typical characteristics current gain vs collector current 10 100 1000 1 10 100 1000 10000 collector current---ic(ma) current gain---hfe vce=1v vce=2v saturation voltage vs collector current 10 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vce(sat) ic=50ib ic=100ib
cystech electronics corp. spec. no. : c657t3 issued date : 2011.02.23 revised date :2012.06.14 page no. : 3/5 BTA1640T3 cystek product specification typical characteristics(cont.) saturation voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vbe(sat)@ic=50ib on voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector collector---ic(ma) on voltage---vbe(on)(mv) vbe(on)@vce=2v typical capacitance characteristics 0 100 200 300 400 500 600 700 800 0.1 1 10 100 reverse-biased voltage---vr(v) capacitance---(pf) cib cob power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 0 50 100 150 200 ambient temperature---ta() power dissipation---pd(w) power derating curve 0 5 10 15 20 25 0 50 100 150 200 case temperature---tc() power dissipation---pd(w)
cystech electronics corp. spec. no. : c657t3 issued date : 2011.02.23 revised date :2012.06.14 page no. : 4/5 BTA1640T3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds 183 c 60-150 seconds time maintained above: ? temperature (t l ) 217 c ? time (t l ) 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c657t3 issued date : 2011.02.23 revised date :2012.06.14 page no. : 5/5 BTA1640T3 cystek product specification to-126 dimension style: pin 1.emitter 2.collector 3.base 3-lead to-126 plastic package cystek package code: t3 marking: a1640 date code *: typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 2.500 2.900 0.098 0.114 e *2.290 *0.090 a1 1.100 1.500 0.043 0.059 e1 4.480 4.680 0.176 0.184 b 0.660 0.860 0.026 0.034 h 0.000 0.300 0.000 0.012 b1 1.170 1.370 0.046 0.054 l 15.300 15.700 0.602 0.618 c 0.450 0.600 0.018 0.024 l1 2.100 2.300 0.083 0.091 d 7.400 7.800 0.291 0.307 p 3.900 4.100 0.154 0.161 e 10.600 11.000 0.417 0.433 3.000 3.200 0.118 0.126 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .


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